Experience Min 3 yrs

Job City Bengalore

Qualification B.E/B.Tech, M.E/M.Tech ( VLSI Domain )

Industry Type Semiconductors / Electronics

Skillset Scan Insertion, TestKompression, ATPG, Memory BIST , JTAG , IC Level ,RTL Coding , Shell Scripting

• Strong knowledge and experience in Scan Insertion, TestKompression, ATPG, Memory BIST and JTAG at IC –level for mixed signal designs. • Experience in using Mentor DfT tools, Cadence RC and simulator tools • Define DfT Strategy and Requirement Specification for the design • DfT verification for gate-level and timing simulations • Work cross sites with design team to define and implement DfT. • Hands on experience in solving DfT problems, simulation failures, ATPG coverage and DRC improvements. • Work with STA engineer to define timing constraints for DfT modes • Support Test engineer in silicon debug and pattern delivery for ATE • Experience in RTL coding, shell scripting • Experienced in handling analog DfT simulations Cv to hr@techksills.net.in